Network traffic is more saturated than ever before. Rapid adoption of increasingly sophisticated artificial intelligence (AI) and machine learning (ML) applications have multiplied the cloud-based workloads exponentially, creating an insatiable demand for more bandwidth to support the acceleration of high speed networking protocols. This means that the historical trend of speeds doubling every 2-3 years might be set to climb even higher in the automation age.
Performance levels required to facilitate AI and ML technology can be facilitated by the latest PCI Express® (PCIe®) standard, the PCIe 6.0 specification. Providing a high performance bandwidth of 64.0 GT/s, PCIe 6.0 doubles the data transfer rate of the previous PCIe 5.0 to provide the low latency required for eliminating bottlenecks and allowing real-time applications and services to perform optimally.
PCIe 6.0 is yet another example of how PCI-SIGR continues to deliver industry-leading specifications that help test engineers stay ahead of market demand for higher bandwidths and lower latencies required for increasingly computer intensive systems. As the digitalization wave continues to overtake industries, the need for speed will inevitably be witnessed throughout data centers, high-performance computing (HPC), storage applications, and other market segments in increasing magnitudes.
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The following architectural challenges need to be overcome to ensure that the system is designed as it should be and the system works as expected:
More selections in equalizer settings are available in PCIe 6.0 specification
Difference between re-timer and re-driver
Re-timer supports the system which has a long channel. It’s important to note that up to 2 re-timers can be used between root complex and device.
While NRZ has 1 bit per 1 clock cycle, PAM4 has 2bits per 1 clock cycle. In addition, PAM4 has a worse signal-to-noise ratio compared to NRZ, but has a higher BER expected than NRZ’s 10E-12 BER.
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